1. System communication architecture design for shared-bus based
system.
The On-chip communication
architecture is the fabric that integrates IP components and provides a
mechanism for them to exchange data and control information. The
increasing number of system components is leading to rapidly growing
on-chip communication bandwidth requirements. Existing protocols have
some limits to deal with the situation. My research is targeting on the
system with fine-grained bus bandwidth allocation control,low power and
communication latencies.
2. Network-on-chip architecture and Algorithm design.
The research includes routing and
switching algorithm, switch architecture and Network topology design.
3. Embedded system deign and FPGA implementation.
Digital circuit design, firmware
and software design, FPGA mapping and placement.
